I have done my Master’s and Doctorate in Electrical Engineering from Korea Advanced Institute of Science and Technology (KAIST), South Korea, one of the top institutes in the world. Moreover, I have an experience of 7~8 years in Integrated Circuit (IC) design in national and international organizations. In this experience, I have designed and fabricated a number of Application Specific Integrated Circuits (ASICs) in addition to designing hardware efficient architectures on Field Programmable Gate Arrays (FPGAs) using Verilog. I have worked extensively on Synopsis and Cadence IC design tools and Xilinx Vivado and Libero FPGA design tools. My work on FPGA and ASIC design is related to efficient implementations of image processing and machine learning algorithms.